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Upcoming Issue on December 2020
Vol. 2 No. 2 (2020)Proofread No. 1. Spatial Temporal Anisotropic Transport of the Microalgae Chlorella Vulgaris
in the Microfluidic ChannelNur Izzati ishak and S.V.Muniandy
https://doi.org/10.33093/jetap.2020.2.2.1, pp. 1 - 10.
Abstract - Transport of biomaterials in confined geometry exhibit complex dynamics, both in spatial and temporal scales. In this work, we examined the transport behavior of microalgae Chlorella Vulgaris inside the microfluidic channel under pressure-driven Poiseuille flow environment. The microalgae system is treated as the spherical naturally buoyant particles. The algae particles trajectories are visually traced using particle imaging techniques and the sample paths are resolved in streamwise (flow) and perpendicular directions. In order to understand boundary wall effects on the flow, we partitioned the microfluidic channel into three different regions, namely the center region and two near-wall boundary regions based on the velocity flow profile. Time-averaged mean square displacement (MSD), probability density function (PDF), skewness, and kurtosis of finite ensembles of particle trajectories are determined for these regions. In addition to the spatial dependencies, we also examined the transient characteristics of the algae transport at early-time and long-time. We found the existence of the mixed types for transport dynamics irrespective of flow region separation often assumed in many laminar flow simulations. This finding will be useful for optimization of mixing of algae culture in micro-scale photobioreactor as the productivity of cell growth depends critically on the cell dispersion or transport.
Keywords—Anomalous transport, Chlorella vulgaris, Microfluidic
Proofread No. 2. An FPGA based Real-Time Multi-Target Synthetic Aperture Radar Echoes Synthesizer
Chua Ming Yam, Koo Voon Chet, Lim Heng Siong and Chan Yee Kit
https://doi.org/10.33093/jetap.2020.2.2.2, pp. 11 - 18.
Abstract – This paper proposes a technique for synthesizing multiple point target scatterer Synthetic Aperture Radar (SAR) echoes in real-time. Traditional approaches require high computation resources to calculate the complex SAR echoes due to its complex mathematical model. The proposed technique employs the low computation Direct Digital Synthesis (DDS) approach to generate these complex sinusoid echoes. The proposed Synthetic Aperture Radar Echoes Synthesizer (SAR-ES) is capable of synthesizing SAR echoes accurately in real-time and was built in a Field Programmable Gate Array (FPGA) platform. The system can be used as a testbed to validate and evaluate the performance of a real-time SAR processing algorithms/system prior to the actual flight mission. This could help in reducing the frequency of flight trials and to reduce the SAR system development risk especially for satellite-borne SAR system.
Keywords—Synthetic Aperture Radar (SAR) echoes, Direct Digital Synthesis (DDS), Field programmable gate array (FPGA)
Proofread No. 3. VHDL Modelling of Low-Cost Memory Fault Detection Tester
Quek Wei Chun, Pang Wai Leong, Chan Kah Yoong, Lee It Ee and Chung Gwo Chin
https://doi.org/10.33093/jetap.2020.2.2.3, pp. 19 - 25.
Abstract – Memory modules are widely used in varies kind of electronics system design. The capacity of the memory modules has increased rapidly since the past few years in order to satisfy the high demand from the end-users. The memory modules’ manufacturers demand more units of automatic test equipment (ATE) to increase the production rate. However, the existing ATE used in the industry to carry out the memory testing is too costly (at least a million dollars per ATE tester). The low-cost memory testers are urgently needed to increase the production rate of the memory module. This has inspired us to design a low-cost memory tester. A low-cost memory fault detection tester with all the major fault detection algorithms that used in industry is modelled using Very High Speed Integrated Circuit Hardware Description Language (VHDL) in this paper to support the need of the low-cost ATE memory tester. The fault detection algorithms modelled are MATS+ (Modified Algorithm Test Sequence), MATS++, March C, March C-, March X, March Y, zero-one and checkerboard scan tests. PERL program is used to analyse the simulation results and a log file will be generated at the end of the memory test. Extensive simulation and experimental test results show that the memory tester modelled covers all the memory test algorithms used in the industry. The low-cost memory fault detection tester designed provides the 100% fault detection coverage for all memory defects.
Keywords—VHDL, Memory Tester, March test
Proofread No. 4. Study of Temperature Measurement Accuracy by Using Different Mounting Adhesives
Jeevan Kanesalingam, See Fung Lee and Hock Guan Ho
https://doi.org/10.33093/jetap.2020.2.2.4, pp. 26 - 29.
Abstract - Thermal compounds are adhesive used to improve heat conduction between two surfaces. It can be used to secure a thermocouple to a surface which the temperature is being measured. This paper studies the temperature accuracy when using different types of thermal adhesives to secure thermocouples to a metal surface. An aluminum block attached to heater resistors was heated up by supplying varying power levels to create different temperatures. The measured temperature is compared to a reference thermocouple in the aluminum block to check the accuracy of each thermocouple when it is secured with different adhesives. It was found using the Loctite 3873 to secure a thermocouple to a metal surface will produce the most accurate temperature reading with an error below 2.6℃. This enables researchers to use the appropriate adhesive to obtain the most accurate results and also to know what are the errors contributed by different adhesives.
Keywords—Thermal compound, Thermocouple adhesive, Aluminum block, Temperature
e-ISSN: 2682-8383, Journal of Engineering Technology and Applied Physics, MMU Press 2019.